al t5020 alt5020 high effciency umts e800 (band 20) lte linear pam adv anced product inform ation - rev 0.0 10 pin 3 mm x 3 mm x 0.9 mm surface mount module figure 1: block diagram fe atures ? lte compliant ? high effciency (lte waveform): ? 42% @ p out = +27.7 dbm ? optimized for smps supply ? low leakage current in shutdown mode: <5 a ? internal voltage regulator ? integrated daisy chainable directional coupler with cpl in and cpl out ports ? optimized for a 50 ? system ? internal dc blocks on in/out rf ports ? 1.8 v control logic ? rohs compliant package, 260 o c msl-3 applic ations ? wireless handsets and data devices for: ? lte (b20) product description the alt5020 pa is designed to provide highly linear output for lte handsets and data devices with high effciency at high power mode. this anadigics pa can be used with an external switch mode power supply (smps) to improve its effciency and reduce current consumption further at high and low output powers. the device is manufactured on an advanced ingap hbt mmic technology offering state-of-the- art reliability, temperature stability, and ruggedness. there are three selectable bias modes that optimize effciency for different output power levels, and a shutdown mode with low leakage current, which increases handset talk and standby time. the self- contained 3 mm x 3 mm x 0.9 mm surface mount package incorporates matching networks optimized for output power, effciency, and linearity in a 50 ? system. 1 2 3 4 5 10 9 8 7 6 v bat t rf in v mode 2 v mode 1 v en cp l ou t gn d cp l in rf ou t v cc bias contro l voltage regulatio n cp l gnd at slug (pad ) 09/2013
2 figure 2: p inout (x-ray top v iew) table 1: pin description v bat t rf in v mode2 v mode 1 v en 1 2 3 4 56 7 8 9 10 cpl out gn d cpl in rf ou t v cc 1 2 3 4 56 7 8 9 10 pi n na me descri pt ion 1v ba tt ba tter y vo lt age 2r f in rf in pu t 3v mode2 mode control voltage 2 4v mo de 1 m ode co nt ro l vo lt age 1 5v en pa en abl e vo lt age 6 7g nd gr ou nd 8 9r f ou t rf ou tp ut 10 v cc su ppl y vo lt age cpl out cpl in coupler output coupler input advanced product information - rev 0.0 09/2013 alt5020
3 electric al characteristics table 2: absolute minimum and maximum ratings functional operation to the specifed performance is not implied under these conditions. o peration of any single parameter in excess of the absolute ratings may cause permanent damage. n o damage occurs if one parameter is set at the limit while all other parameters are set within normal operating ranges. table 3: operating ranges the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defned in the electrical specifcations. notes: (1) for operation at v cc = +3.1 v, p out is derated by 0.8 db. (2) for operation at 105 c, p out is derated by 1.0 db. (3) lte waveform characteristics up to 20 mhz qpsk, 18 rbs. p arameter min typ max unit comments operating frequency (f) 832 - 862 mhz umts band 20 supply voltage (v cc ) +0.6 +3.4 +4.4 v p < +27.7 dbm battery voltage (v batt ) +3.1 +3.4 +4.4 v p < +27.7 dbm enable voltage (v enable ) +1.35 +1.8 +3.1 +0.5 v pa on pa shut down mode control voltage (v mode1 ) +1.35 +1.8 +3.1 +0.5 v low bias mode high bias mode rf output power (p ) (1, 2, 3) lte, hpm lte, lpm 26.9 - 27.7 16 - - dbm ts 36.101 rel 8 for lte case temperature (t c ) -30 - +90 c p arameter min typ max unit rf input (p in ) - 10 dbm v cc 3.4 5 v v batt 3.4 6 v control voltage (v enable , v mode ) 1.8 3.5 v storage temperature (t storage ) -40 25 150 c advanced product information - rev 0.0 09/2013 alt5020
4 table 4: electrical specifcations - lte operation (rb = 12, start = 0, qpsk) (t c = +25 c, v batt = +3.4 v, v en = +1.8 v, 50 system, unless otherwise specifed) p arameter min typ max unit comments p out v cc v mode1 v mode2 gain 26.5 18 14 30 22 17 33 25 21 db +27.7 dbm +16 dbm +7 dbm 3.4 v 1.4 v 0.7 v 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr e-utra (1) at 10 mhz offset - - - -38 -38 -40 -34 -34 -34 dbc +27.7 dbm +16 dbm +7 dbm 3.4 v 1.4 v 0.7 v 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr1 utra (1) at 7.5 mhz offset - - - -39 -39 -40 -36 -36 -36 dbc +27.7 dbm +16 dbm +7 dbm 3.4 v 1.4 v 0.7 v 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v aclr2 utra (1) at 12.5 mhz offset - - - <-60 <-60 <-60 -40 -40 -40 dbc +27.7 dbm +16 dbm +7 dbm 3.4 v 1.4 v 0.7 v 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v effciency (1) 33 - - 38 22 13 - - - % +27.7 dbm +16 dbm +7 dbm 3.4 v 1.4 v 0.7 v 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) low bias mode - 25 - ma through v cc pin, v mode1,2 = +1.8 v mode control current - 0.05 0.1 ma through v mode pin, v mode1 = 1.8 v enable current - 0.05 0.1 ma through v enable pin batt current - 3 5.5 ma through v batt pin, v mode1 = +1.8 v leakage current - <5 10 a v batt = +4.4 v, v cc = +4.4 v v enable = 0 v, v mode1 = 0 v noise in receive band (2) - tbd - dbm/hz 791 - 821 mhz harmonics 2f o 3f o , 4f o - - tbd tbd - - dbc p out < +27.7 dbm input impedance - - 2:1 vswr coupling factor - 20 - db directivity - 20 - db coupler in-out daisy chain insertion loss - <0.25 - db 698 to 2620 mhz pin 8 to 6 shutdown mode spurious output level (all suprious outputs) - - <-65 dbc p out < +27.7 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range notes: (1) aclr and effciency measured at 847 mhz. advanced product information - rev 0.0 09/2013 alt5020
5 applic ation inform ation to ensure proper performance, refer to all related application notes on the anadigics web site: http://www.anadigics.com shutdown mode the power amplifer may be placed in a shutdown mode by applying logic low levels (see operating ranges table) to the v enable and v mode voltages. bias modes the power amplifer may be placed in either a low, medium or high bias mode by applying the appropriate logic level (see operating ranges table) to v mode1,2 . the bias control table lists the recommended modes of operation for various applications. three operating modes are available to optimize current consumption. high bias/high power operating mode is for p out levels > 15 dbm. at around 16 dbm output power, the pa should be mode switched to medium power mode for lowest quiescent current consumption. the pa should be switched to low bias/ low power mode at ~<7 dbm. figure 3: recommended on/off timing sequence v en v cc note 1 rf in notes 1,2 off sequence referenced after 90 % of rise time referenced before 10 % of fall time on sequenc e on sequence start t_ 0n = 0 t_ 0n +1 s t_ 0n +3 s off sequence start t_ 0f f = 0 t_ 0f f+ 2 st _0 ff +3 s vcontrols venable/vmode(s ) rise/fall max 1 s defined at 10% to 90% of min/max voltage notes: (1) level might be changed after rf is on. (2) rf off defned as p in -30 dbm. (3) switching simultaneously between v mode and v en is not recommended. advanced product information - rev 0.0 09/2013 alt5020
6 table 5: bias control applic ation p out levels bias mode v enable v mode1 v mode2 v cc v batt high power (high bias mode) > +16 dbm high +1.8 v 0 v 0 v 0.6 - 4.4 v 3.1 - 4.4 v med power (med bias mode) +17 dbm medium +1.8 v +1.8 v 0 v 0.6 - 4.4 v 3.1 - 4.4 v low power (low bias mode) +8 dbm low +1.8 v +1.8 v +1.8 v 0.6 - 4.4 v 3.1 - 4.4 v shutdown - shutdown 0 v 0 v 0 v 0.6 - 4.4 v 3.1 - 4.4 v figure 4: evaluation board schematic c4 2.2f ceramic rf in 1 6 7 10 8 5 4 3 v batt v mode1 rf out rf in gnd v cc v en n/c v cc c1 v batt v mode 1 v en 29 c2 2.2 f c3 0.1f gnd at slug n/c rf out 33pf v mode 2 v mode2 advanced product information - rev 0.0 09/2013 alt5020
7 figure 5: package outline - 10 pin 3 mm x 3 mm x 0.94 mm surface mount module figure 6: branding specifcation package outline 5020 llllnn yy wwc c pin 1 identifier pa rt number date co de y y=y ear ; ww=w ork week c ountr y co de (c c) l ot number advanced product information - rev 0.0 09/2013 alt5020
8 figure 7: recommended pcb layout information pcb and stencil design guideline advanced product information - rev 0.0 09/2013 alt5020
9 component packaging figure 8: carrier tape pin 1 figure 9: reel advanced product information - rev 0.0 09/2013 alt5020
10 ordering information o rder num be r te mp er at ure ra ng e pa ckag e descri pt ion co mp on ent pa ckagin g al t5 020q 7- 30 o c to +9 0 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 0.94 mm su rf ace mo unt mo du le t ape an d r eel , 2500 pi eces per r eel al t5 020p 9- 30 o c to +9 0 o c ro hs co mp li an t 10 pi n 3 mm x 3 mm x 0.94 mm su rf ace mo unt mo du le pa rt ia l t ape an d r eel warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. import ant notice anadigics, inc. 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifcations contained in advanced product information sheets and preliminary data sheets are subject to change prior to a products formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. advanced product information - rev 0.0 09/2013 alt5020
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